The present invention generally relates to transistor chip carriers, and more specifically, to leadless chip carriers for radio frequency (RF) power transistors.
Transistors find use in a wide range of electronic applications. For example, transistors find use in low power applications such as oscillator circuits, and high power applications such as power amplifiers. To facilitate the use of transistors in such applications, the transistors, which are usually in the form of semiconductor dies or chips, are usually housed in a carrier or package suitable for either a low power, high density application, such as a chip carrier, or for a high power application, such as a stripline-opposed-emitter (SOE) package having low lead inductance. Such packages are usually formed from an electrically insulating material having thermal properties and mounting configurations appropriate for the amount of heat dissipation expected to be encountered from the transistor devices. In the case of an RF device, the packages not only provide a housing for the transistor devices, but they also provide room for impedance matching circuitry which is necessary for proper operation in a given circuit application. The carriers provide encapsulation of the transistor device dies, or chips, to protect them from the external environment as well as from rough handling encountered during manufacturing, testing, or assembling them into a final product.
One problem associated with prior art carriers for RF power devices is that they do not afford automated testing of the packaged transistor devices before final interconnection into a circuit. This is due to the fact that prior art carriers, especially the SOE package, require special circuit board techniques to accommodate the relatively wide, external metal straps or leads which electrically connect to the base, emitter, and collector terminals of the internal individual devices. The fact that these packages require special circuit boards for the metal straps makes automated testing very awkward. The leads themselves are fragile, easily bent or broken, and they greatly affect the overall manufacturing cost. As a result, these packages preclude automated placement, requiring individual placement and soldering into a circuit board in a final product. Such prior art carriers for RF power devices, therefore, cannot take advantage of more efficient and economical manufacturing processes, such as automated placement and reflow soldering.
It is therefore an object of the present invention to provide a new and improved leadless chip carrier suitable for RF power transistors or the like which overcomes the foregoing deficiencies.
It is a further object of the present invention to provide a leadless chip carrier of the foregoing type which affords testing of the completed chip carrier including the transistor devices and any included matching circuitry prior to interconnection into a circuit.
It is a still further object of the present invention to provide a leadless chip carrier of the foregoing type which permits electrical connection of the terminals beneath the completed chip carrier to accompanying circuitry by automated placement and reflow soldering techniques.
It is a still further object of the present invention to provide a method of making a new and improved leadless chip carrier suitable for RF power transistors or the like.